[clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)

[Brandon Wu via llvm-commits]

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@@ -32,3 +36,39 @@ vint32m1_t test_no_vector_cc_attr(vint32m1_t input, int32_t *base, size_t vl) {
   __riscv_vse32_v_i32m1(base, val, vl);
   return ret;
 }
+
+// CHECK-LLVM: define dso_local void @test_vls_no_cc(i128 noundef %arg.coerce)
+// CHECK-LLVM-ABI-VLEN: define dso_local void @test_vls_no_cc(<vscale x 1 x i32> noundef %arg.coerce)
+void test_vls_no_cc(__attribute__((vector_size(16))) int arg) {}
+
+// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen(<vscale x 2 x i32> noundef %arg.coerce)
+// CHECK-LLVM-ABI-VLEN: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen(<vscale x 2 x i32> noundef %arg.coerce)
+void __attribute__((riscv_vls_cc)) test_vls_default_abi_vlen(__attribute__((vector_size(16))) int arg) {}
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4vtomat wrote:

Correct, I think I misunderstood something lol

https://github.com/llvm/llvm-project/pull/100346