[llvm] [RegAlloc] Scale the spill weight by the weight of register class (PR #113675)

[Pengcheng Wang via llvm-commits]

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@@ -7357,6 +7357,20 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i64(ptr addrspace(1) %ou
 ; GCN-NOHSA-SI-NEXT:    buffer_load_dword v15, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload
 ; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(2)
 ; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v13, v39
+; GCN-NOHSA-SI-NEXT:    buffer_store_dword v12, off, s[12:15], 0 ; 4-byte Folded Spill
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wangpc-pp wrote:

I know nothing about AMDGPU target, can someone take a look at this?

https://github.com/llvm/llvm-project/pull/113675