[llvm] [RegAlloc] Scale the spill weight by the weight of register class (PR #113675)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 9 01:22:29 PST 2024
wangpc-pp wrote:
> > I think the `frequency` and the `size` here are the same thing as long as we are using reg units to scale the weight. For example, for a LMUL 8 register, we can consider it as that all its 8 registers have one use, `frequency+=8` and also `size+=8`.
>
> Ah ok that makes sense to me at least for RISC-V, where a single LMUL 8 spill would be roughly the same as 8 * LMUL 1 spills. Does this hold for other targets though? E.g. could it be possible that spilling a register that uses two regunits costs the same as spilling another register that only uses one regunit?
Yeah, good point! I think X86 may be the one, it has a lot of overlapped registers. But from the perpective of spills/reloads bytes, it may still be profitable. cc @topperc WDYT?
@arsenm I think this can be an evidence that we shouldn't apply the scaling by weight behavior to all targets.
https://github.com/llvm/llvm-project/pull/113675
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