[llvm] [AArch64][SVE] Fix for wide adds trying to be generated (PR #118838)

via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 5 09:32:07 PST 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: James Chesterman (JamesChesterman)

<details>
<summary>Changes</summary>

Wide adds would try to be generated when SVE is enabled not SVE2.

---
Full diff: https://github.com/llvm/llvm-project/pull/118838.diff


1 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 7ab3fc06715ec8..75f0bae84db67e 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -21814,7 +21814,7 @@ SDValue tryLowerPartialReductionToWideAdd(SDNode *N,
              Intrinsic::experimental_vector_partial_reduce_add &&
          "Expected a partial reduction node");
 
-  if (!Subtarget->isSVEorStreamingSVEAvailable())
+  if (!Subtarget->hasSVE2() && !Subtarget->isStreamingSVEAvailable())
     return SDValue();
 
   SDLoc DL(N);

``````````

</details>


https://github.com/llvm/llvm-project/pull/118838


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