[llvm] [AArch64][SVE] Fix for wide adds trying to be generated (PR #118838)

[James Chesterman via llvm-commits]

https://github.com/JamesChesterman created https://github.com/llvm/llvm-project/pull/118838

Wide adds would try to be generated when SVE is enabled not SVE2.

>From 1a68328b4a9fcd7dd8f3be01312cf30c827ef0bd Mon Sep 17 00:00:00 2001
From: James Chesterman <james.chesterman at arm.com>
Date: Thu, 5 Dec 2024 17:29:38 +0000
Subject: [PATCH] [AArch64][SVE] Fix for wide adds trying to be generated

Wide adds would try to be generated when SVE is enabled not SVE2.
---
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 7ab3fc06715ec8..75f0bae84db67e 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -21814,7 +21814,7 @@ SDValue tryLowerPartialReductionToWideAdd(SDNode *N,
              Intrinsic::experimental_vector_partial_reduce_add &&
          "Expected a partial reduction node");
 
-  if (!Subtarget->isSVEorStreamingSVEAvailable())
+  if (!Subtarget->hasSVE2() && !Subtarget->isStreamingSVEAvailable())
     return SDValue();
 
   SDLoc DL(N);