[llvm] IR: Allow vector type in atomic load and store (PR #117625)

[via llvm-commits]

jofrn wrote:

The change from my end only needs X86 support, and that is all that is implemented at the moment. If we can get this PR and the next PR in (whether they are together or not), then the internal test will pass. Some of the backend implementations are already implemented too, so we might as well enable it separately.

https://github.com/llvm/llvm-project/pull/117625