[llvm] 8895932 - [NVPTX] Avoid implicit truncation in getConstant()

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2024-11-22T14:59:52+01:00
New Revision: 88959324710a5a24687162642d4faf7e056743c5

URL: https://github.com/llvm/llvm-project/commit/88959324710a5a24687162642d4faf7e056743c5
DIFF: https://github.com/llvm/llvm-project/commit/88959324710a5a24687162642d4faf7e056743c5.diff

LOG: [NVPTX] Avoid implicit truncation in getConstant()

Either use getSignedConstant() or change variable type to unsigned
to avoid unnecessary sign extension in the first place.

Added: 
    

Modified: 
    llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
index 173c37cfd8c8f7..3b03ec67dc8ce0 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
@@ -3936,8 +3936,8 @@ bool NVPTXDAGToDAGISel::SelectADDRri_imp(
       if (!CN->getAPIntValue().isSignedIntN(32))
         return false;
 
-      Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(OpNode),
-                                         MVT::i32);
+      Offset = CurDAG->getSignedTargetConstant(CN->getSExtValue(),
+                                               SDLoc(OpNode), MVT::i32);
       return true;
     }
   }

diff  --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index e93430a27dc32e..b9003ddbd3187c 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -2714,10 +2714,10 @@ SDValue NVPTXTargetLowering::LowerFROUND32(SDValue Op,
 
   // RoundedA = (float) (int) ( A > 0 ? (A + 0.5f) : (A - 0.5f))
   SDValue Bitcast  = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A);
-  const int SignBitMask = 0x80000000;
+  const unsigned SignBitMask = 0x80000000;
   SDValue Sign = DAG.getNode(ISD::AND, SL, MVT::i32, Bitcast,
                              DAG.getConstant(SignBitMask, SL, MVT::i32));
-  const int PointFiveInBits = 0x3F000000;
+  const unsigned PointFiveInBits = 0x3F000000;
   SDValue PointFiveWithSignRaw =
       DAG.getNode(ISD::OR, SL, MVT::i32, Sign,
                   DAG.getConstant(PointFiveInBits, SL, MVT::i32));
@@ -3031,9 +3031,9 @@ SDValue NVPTXTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
         ISD::ADD, DL, VAList.getValueType(), VAList,
         DAG.getConstant(MA->value() - 1, DL, VAList.getValueType()));
 
-    VAList = DAG.getNode(
-        ISD::AND, DL, VAList.getValueType(), VAList,
-        DAG.getConstant(-(int64_t)MA->value(), DL, VAList.getValueType()));
+    VAList = DAG.getNode(ISD::AND, DL, VAList.getValueType(), VAList,
+                         DAG.getSignedConstant(-(int64_t)MA->value(), DL,
+                                               VAList.getValueType()));
   }
 
   // Increment the pointer, VAList, to the next vaarg