[llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)

[Alexey Bataev via llvm-commits]

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@@ -1,8 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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alexey-bataev wrote:

Yes

https://github.com/llvm/llvm-project/pull/67812