[llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)

[Mel Chen via llvm-commits]

================
@@ -1,8 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
----------------
Mel-Chen wrote:

@alexey-bataev 
Could you confirm if my understanding is correct so that I can rebase?

https://github.com/llvm/llvm-project/pull/67812