[llvm] [RISC-V] Support fixed vector type for inline asm (#117098) (PR #117100)

[Craig Topper via llvm-commits]

topperc wrote:

> > This kind of seems like a frontend bug. Why did clang pass it as a fixed vecor? Removing `__attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul)))` works as expected.
> 
> Do you mean that all the inline asm parameters should be scalable vector types rather than fixed vector types? So I need to fix why clang pass fixed vector types to inline asm?

Yes. Without `__attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul)))` the inline asm parameters are scalable vectors. I don't think the attribute was supposed to change that.

https://github.com/llvm/llvm-project/pull/117100