[llvm] [AMDGPU][True16][MC] support more VOP3 inst in true16/fake16 format (PR #113603)

Ivan Kosarev via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 19 04:02:05 PST 2024


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@@ -3665,7 +3665,10 @@ multiclass Int16Med3Pat<Instruction med3Inst,
 defm : FPMed3Pat<f32, V_MED3_F32_e64>;
 
 let SubtargetPredicate = HasMed3_16 in {
+let True16Predicate = NotHasTrue16BitInsts in
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kosarev wrote:

Probably not very critical, but the title says [MC] and there seem to be changes adding isel patterns -- might be something to avoid doing in future patches?

https://github.com/llvm/llvm-project/pull/113603


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