[llvm] [AMDGPU][MC][True16] Support VOP2 instructions with true16 format (PR #115233)

[Ivan Kosarev via llvm-commits]

================
@@ -345,6 +345,25 @@ static DecodeStatus decodeOperand_VSrcT16_Lo128(MCInst &Inst, unsigned Imm,
                               (AMDGPU::OperandSemantics)OperandSemantics));
 }
 
+template <AMDGPUDisassembler::OpWidthTy OpWidth, unsigned ImmWidth,
+          unsigned OperandSemantics>
+static DecodeStatus
+decodeOperand_VSrcT16_Lo128_Deferred(MCInst &Inst, unsigned Imm,
----------------
kosarev wrote:

Looks this can be combined with decodeOperand_VSrcT16_Lo128(), e.g., by adding a `Deferred` template parameter?

https://github.com/llvm/llvm-project/pull/115233