[llvm] [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (PR #116075)

[Craig Topper via llvm-commits]

topperc wrote:

> > No tests fail if you just delete the bitconvert from the pattern
> 
> > 
> 
> > ```
> 
> > diff --git a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
> 
> > index 250896cbbe5f..2caf7e0d1908 100644
> 
> > --- a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
> 
> > +++ b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
> 
> > @@ -75,7 +75,7 @@ class VecCond<SDPatternOperator OpNode, ValueType TyNode,
> 
> >  }
> 
> >  
> 
> >  def vsplat_imm_eq_1 : PatFrags<(ops), [(build_vector),
> 
> > -                                       (bitconvert (v4i32 (build_vector)))], [{
> 
> > +                                       ], [{
> 
> >    APInt Imm;
> 
> >    EVT EltTy = N->getValueType(0).getVectorElementType();
> 
> >  
> 
> > ```
> 
> 
> 
> I agree, I must have been foolish at that time.

The pattern was added before build_vector lowering was added. Maybe it used to be needed?

https://github.com/llvm/llvm-project/pull/116075