[llvm] [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (PR #116075)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 13 19:01:31 PST 2024
dtcxzyw wrote:
> No tests fail if you just delete the bitconvert from the pattern
>
> ```
> diff --git a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
> index 250896cbbe5f..2caf7e0d1908 100644
> --- a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
> +++ b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
> @@ -75,7 +75,7 @@ class VecCond<SDPatternOperator OpNode, ValueType TyNode,
> }
>
> def vsplat_imm_eq_1 : PatFrags<(ops), [(build_vector),
> - (bitconvert (v4i32 (build_vector)))], [{
> + ], [{
> APInt Imm;
> EVT EltTy = N->getValueType(0).getVectorElementType();
>
> ```
Done.
https://github.com/llvm/llvm-project/pull/116075
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