[llvm] [RISCV][MachineVerifier] Use RegUnit for register liveness checking (PR #115980)

[Piyou Chen via llvm-commits]

BeMg wrote:

Without this patch, the testcase will report

```
*** Bad machine code: Using an undefined physical register ***
- function:    func
- basic block: %bb.0  (0xa3bc568)
- instruction: $v20m2 = VMV2R_V $v14m2, implicit $v12_v13_v14_v15_v16
- operand 1:   $v14m2
LLVM ERROR: Found 1 machine code errors.
```

https://github.com/llvm/llvm-project/pull/115980