[llvm] [RISCV][MRI] Account for fixed registers when determining callee saved regs (PR #115756)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 11 11:43:18 PST 2024
topperc wrote:
> > Does this change the stack layout of callee saved registers when one is reserved?
>
> This patch causes us not to spill the reserved register, when we were spilling it before. This by definition changes the stack layout.
>
> > Does it match gcc stack layout?
>
> I tried with this program with my patch applied:
>
> ```
> register long a asm("x24");
> int bar();
> int baz(int a, int b, int c, int d);
> int foo(int b, int c, int d) {
> a = 123;
> bar();
> baz(a, b, c, d);
> return 0;
> }
> ```
>
> GCC:
>
> ```
> sd ra,24(sp)
> sd s0,16(sp)
> sd s1,8(sp)
> sd s2,0(sp)
> ```
>
> LLVM + this patch:
>
> ```
> sd ra, 24(sp) # 8-byte Folded Spill
> sd s0, 16(sp) # 8-byte Folded Spill
> sd s1, 8(sp) # 8-byte Folded Spill
> sd s2, 0(sp) # 8-byte Folded Spill
> ```
>
> Looks the same on this example.
A better test would spill s7 and s9, but not s8. I want to know if s8 still gets allocated a slot in gcc.
https://github.com/llvm/llvm-project/pull/115756
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