[llvm] [AArch64] Define high bits of FPR and GPR registers (take 2) (PR #114827)

[David Green via llvm-commits]

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@@ -396,6 +399,9 @@ class MCRegisterInfo {
   /// Returns true if the given register is constant.
   bool isConstant(MCRegister RegNo) const { return get(RegNo).IsConstant; }
 
+  /// Returns true if the given register is artificial.
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davemgreen wrote:

Is it worth explaining what Artificial means more precisely?

https://github.com/llvm/llvm-project/pull/114827