[llvm] [AMDGPU][MC] Fix disassembler problem for image_atomic with TFE (PR #112622)

Wed Oct 23 01:59:05 PDT 2024

mbrkusanin wrote:

> > There is still this issue with inconsistent naming for Vx where x would match the size of vdata. Currently it is:
> > `IMAGE_ATOMIC_CMPSWAP_V1_*` has VReg_64 `IMAGE_ATOMIC_CMPSWAP_V2_*` has VReg_128 `IMAGE_ATOMIC_CMPSWAP_V3_*` has VReg_96 `IMAGE_ATOMIC_CMPSWAP_V4_*` has VReg_160
> 
> Are you saying for atomic_cmpswap, V2 should be VReg_96, and V3 VReg_128?

I was thinking that it would make more sense if cmpswap skipped V1 and had variants V2, V3, V4, V5 with values VReg_64, VReg_96, VReg_128, VReg_160 respectively. That way name Vx matches size (32*x).

(might need to update some .mir tests)

https://github.com/llvm/llvm-project/pull/112622