[llvm] [LLVM][AArch64] Add assembly/disassembly for FTMOPA and BFTMOPA (PR #113230)

[via llvm-commits]

github-actions[bot] wrote:

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git-clang-format --diff 7a90ff752c4e07e6826d9e1f23871401a6592b23 1d3df0da8f7fc81511820605c5e00758176feacf --extensions cpp -- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
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diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index b72dd03fa2..52f91662d2 100644
--- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -394,7 +394,7 @@ static DecodeStatus DecodeZPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo,
 // 111
 static DecodeStatus DecodeZK(MCInst &Inst, unsigned RegNo, uint64_t Address,
                              const MCDisassembler *Decoder) {
-  if(RegNo > 7)
+  if (RegNo > 7)
     return Fail;
 
   unsigned Register =
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
index e43a336f8b..a019ff8eac 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
@@ -591,7 +591,7 @@ uint32_t AArch64MCCodeEmitter::EncodeZK(const MCInst &MI, unsigned OpIdx,
 
   assert((RegOpnd > AArch64::Z19 && RegOpnd < AArch64::Z24) &&
          "Expected ZK in Z20..Z23 or Z28..Z31");
-  // Z20-Z23 => Reg is in 0..3 (offset 20) 
+  // Z20-Z23 => Reg is in 0..3 (offset 20)
   return (RegVal - 20);
 }
 

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https://github.com/llvm/llvm-project/pull/113230