[llvm] Promote pseudo opcodes from 32-bit to 64-bit for instructions that infer extsw elimination in PPCMIPeepholes pass (PR #85451)

[zhijian lin via llvm-commits]

================
@@ -525,6 +525,18 @@ def getAltVSXFMAOpcode : InstrMapping {
   let ValueCols = [["1"]];
 }
 
+def get64BitInstrFromSignedExt32BitInstr : InstrMapping {
+  let FilterClass = "SExt32To64";
+  // Instructions with the same opcode.
+  let RowFields = ["Inst"];
+  // Instructions with the same Interpretation64Bit value form a column.
----------------
diggerlin wrote:

there are other definitions,   for example, `getNonRecordFormOpcode`, `getAltVSXFMAOpcode` which use the same comment style. I think we just need to keep the same comment style as them.

https://github.com/llvm/llvm-project/pull/85451