[llvm] [LLVM][AArch64] Add register classes for Armv9.6 assembly (PR #111717)

[via llvm-commits]

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@@ -191,10 +191,13 @@ class AArch64MCCodeEmitter : public MCCodeEmitter {
   unsigned fixOneOperandFPComparison(const MCInst &MI, unsigned EncodedValue,
                                      const MCSubtargetInfo &STI) const;
 
-  template <unsigned Multiple>
-  uint32_t EncodeRegAsMultipleOf(const MCInst &MI, unsigned OpIdx,
-                                 SmallVectorImpl<MCFixup> &Fixups,
-                                 const MCSubtargetInfo &STI) const;
+  template <unsigned Multiple, unsigned Min = 0, unsigned Max = 30>
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Lukacma wrote:

Removing the defaults, here and instead specifying the allowed range at the point of use might be safer and less error prone

https://github.com/llvm/llvm-project/pull/111717