[llvm] [AMDGPU] Tidy SIPreAllocateWWMRegs after recent changes (NFCI) (PR #111967)

[Jay Foad via llvm-commits]

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@@ -111,7 +111,9 @@ body:             |
   ; GCN-NEXT:   $sgpr22 = IMPLICIT_DEF
   ; GCN-NEXT:   $vgpr5 = IMPLICIT_DEF
   ; GCN-NEXT:   $vgpr5 = SI_SPILL_S32_TO_VGPR $sgpr22, 0, killed $vgpr5
+  ; GCN-NEXT:   $sgpr0 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
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jayfoad wrote:

How can the patch be NFCI if it is introducing these ENTER/EXIT MIs? Is there some reason they have no effect on the final codegen?

https://github.com/llvm/llvm-project/pull/111967