[llvm] [RISCV] Add DAG combine to turn (sub (shl X, 8-Y), (shr X, Y)) into orc.b (PR #111828)

[Daniel Mokeev via llvm-commits]

================
@@ -13587,18 +13591,41 @@ static SDValue combineSubShiftToOrcB(SDNode *N, SelectionDAG &DAG,
   SDValue N0 = N->getOperand(0);
   SDValue N1 = N->getOperand(1);
 
-  if (N0.getOpcode() != ISD::SHL || N0.getOperand(0) != N1 || !N0.hasOneUse())
+  if (N0->getOpcode() != ISD::SHL)
+    return SDValue();
+  
+  auto *ShAmtCLeft = dyn_cast<ConstantSDNode>(N0.getOperand(1));
+  if (!ShAmtCLeft)
----------------
damokeev wrote:

Shifting left by 8 is fine, since we get back to the original `(sub (shl X, 8), X)` case. Maybe a more elegant solution would be 
```c++
if (ShiftedAmount >= 8)
  return SDValue();
```

https://github.com/llvm/llvm-project/pull/111828