[llvm] [RISCV] Add DAG combine to turn (sub (shl X, 8-Y), (shr X, Y)) into orc.b (PR #111828)

Yingwei Zheng via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 10 08:17:53 PDT 2024


================
@@ -13587,18 +13591,41 @@ static SDValue combineSubShiftToOrcB(SDNode *N, SelectionDAG &DAG,
   SDValue N0 = N->getOperand(0);
   SDValue N1 = N->getOperand(1);
 
-  if (N0.getOpcode() != ISD::SHL || N0.getOperand(0) != N1 || !N0.hasOneUse())
+  if (N0->getOpcode() != ISD::SHL)
+    return SDValue();
+  
+  auto *ShAmtCLeft = dyn_cast<ConstantSDNode>(N0.getOperand(1));
+  if (!ShAmtCLeft)
----------------
dtcxzyw wrote:

```suggestion
  if (!ShAmtCLeft || ShAmtCLeft->getZExtValue() >= 8 || ShAmtCLeft->getZExtValue() == 0)
```


https://github.com/llvm/llvm-project/pull/111828


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