[llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #111274)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-regalloc

Author: Kazu Hirata (kazutakahirata)

<details>
<summary>Changes</summary>



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Full diff: https://github.com/llvm/llvm-project/pull/111274.diff


1 Files Affected:

- (modified) llvm/lib/CodeGen/RegisterBankInfo.cpp (+4-6) 


``````````diff
diff --git a/llvm/lib/CodeGen/RegisterBankInfo.cpp b/llvm/lib/CodeGen/RegisterBankInfo.cpp
index 00dcc1fbcd0c77..e1720b038e2361 100644
--- a/llvm/lib/CodeGen/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterBankInfo.cpp
@@ -103,12 +103,10 @@ const TargetRegisterClass *
 RegisterBankInfo::getMinimalPhysRegClass(Register Reg,
                                          const TargetRegisterInfo &TRI) const {
   assert(Reg.isPhysical() && "Reg must be a physreg");
-  const auto &RegRCIt = PhysRegMinimalRCs.find(Reg);
-  if (RegRCIt != PhysRegMinimalRCs.end())
-    return RegRCIt->second;
-  const TargetRegisterClass *PhysRC = TRI.getMinimalPhysRegClassLLT(Reg, LLT());
-  PhysRegMinimalRCs[Reg] = PhysRC;
-  return PhysRC;
+  const auto [RegRCIt, Inserted] = PhysRegMinimalRCs.try_emplace(Reg);
+  if (Inserted)
+    RegRCIt->second = TRI.getMinimalPhysRegClassLLT(Reg, LLT());
+  return RegRCIt->second;
 }
 
 const RegisterBank *RegisterBankInfo::getRegBankFromConstraints(

``````````

</details>


https://github.com/llvm/llvm-project/pull/111274