[llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #111274)

[Kazu Hirata via llvm-commits]

https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/111274

None

>From 4e48b93e09b01c6b1ea7a5af88efd3b20b2ad3ca Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Sat, 5 Oct 2024 10:27:55 -0700
Subject: [PATCH] [CodeGen] Avoid repeated hash lookups (NFC)

---
 llvm/lib/CodeGen/RegisterBankInfo.cpp | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/llvm/lib/CodeGen/RegisterBankInfo.cpp b/llvm/lib/CodeGen/RegisterBankInfo.cpp
index 00dcc1fbcd0c77..e1720b038e2361 100644
--- a/llvm/lib/CodeGen/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterBankInfo.cpp
@@ -103,12 +103,10 @@ const TargetRegisterClass *
 RegisterBankInfo::getMinimalPhysRegClass(Register Reg,
                                          const TargetRegisterInfo &TRI) const {
   assert(Reg.isPhysical() && "Reg must be a physreg");
-  const auto &RegRCIt = PhysRegMinimalRCs.find(Reg);
-  if (RegRCIt != PhysRegMinimalRCs.end())
-    return RegRCIt->second;
-  const TargetRegisterClass *PhysRC = TRI.getMinimalPhysRegClassLLT(Reg, LLT());
-  PhysRegMinimalRCs[Reg] = PhysRC;
-  return PhysRC;
+  const auto [RegRCIt, Inserted] = PhysRegMinimalRCs.try_emplace(Reg);
+  if (Inserted)
+    RegRCIt->second = TRI.getMinimalPhysRegClassLLT(Reg, LLT());
+  return RegRCIt->second;
 }
 
 const RegisterBank *RegisterBankInfo::getRegBankFromConstraints(