[llvm] [RISCV][GISEL] instruction-select vmclr (PR #110782)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 2 11:14:56 PDT 2024


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@@ -379,6 +381,30 @@ RISCVInstructionSelector::selectSHXADD_UWOp(MachineOperand &Root,
   return std::nullopt;
 }
 
+InstructionSelector::ComplexRendererFns
+RISCVInstructionSelector::renderVLOp(MachineOperand &Root) const {
+  MachineRegisterInfo &MRI =
----------------
michaelmaitland wrote:

It's not. Is it okay for me to do this as a follow up? There are many other functions in this file that are getting MRI like this that need refactoring too.

https://github.com/llvm/llvm-project/pull/110782


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