[llvm] 65c41da - [Lanai] Use MCRegister. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 29 13:33:36 PDT 2024
Author: Craig Topper
Date: 2024-09-29T13:22:18-07:00
New Revision: 65c41da7d2f20b4abdc7059e49eb2603632de445
URL: https://github.com/llvm/llvm-project/commit/65c41da7d2f20b4abdc7059e49eb2603632de445
DIFF: https://github.com/llvm/llvm-project/commit/65c41da7d2f20b4abdc7059e49eb2603632de445.diff
LOG: [Lanai] Use MCRegister. NFC
Added:
Modified:
llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp b/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
index 280f1f3ddbb69f..7ede5e3ed40932 100644
--- a/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
+++ b/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
@@ -118,7 +118,7 @@ struct LanaiOperand : public MCParsedAsmOperand {
};
struct RegOp {
- unsigned RegNum;
+ MCRegister RegNum;
};
struct ImmOp {
@@ -126,8 +126,8 @@ struct LanaiOperand : public MCParsedAsmOperand {
};
struct MemOp {
- unsigned BaseReg;
- unsigned OffsetReg;
+ MCRegister BaseReg;
+ MCRegister OffsetReg;
unsigned AluOp;
const MCExpr *Offset;
};
@@ -166,12 +166,12 @@ struct LanaiOperand : public MCParsedAsmOperand {
return StringRef(Tok.Data, Tok.Length);
}
- unsigned getMemBaseReg() const {
+ MCRegister getMemBaseReg() const {
assert(isMem() && "Invalid type access!");
return Mem.BaseReg;
}
- unsigned getMemOffsetReg() const {
+ MCRegister getMemOffsetReg() const {
assert(isMem() && "Invalid type access!");
return Mem.OffsetReg;
}
@@ -439,7 +439,7 @@ struct LanaiOperand : public MCParsedAsmOperand {
void addMemRegRegOperands(MCInst &Inst, unsigned N) const {
assert(N == 3 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getMemBaseReg()));
- assert(getMemOffsetReg() != 0 && "Invalid offset");
+ assert(getMemOffsetReg() && "Invalid offset");
Inst.addOperand(MCOperand::createReg(getMemOffsetReg()));
Inst.addOperand(MCOperand::createImm(getMemOp()));
}
@@ -589,10 +589,10 @@ struct LanaiOperand : public MCParsedAsmOperand {
return Op;
}
- static std::unique_ptr<LanaiOperand> createReg(unsigned RegNum, SMLoc Start,
+ static std::unique_ptr<LanaiOperand> createReg(MCRegister Reg, SMLoc Start,
SMLoc End) {
auto Op = std::make_unique<LanaiOperand>(REGISTER);
- Op->Reg.RegNum = RegNum;
+ Op->Reg.RegNum = Reg;
Op->StartLoc = Start;
Op->EndLoc = End;
return Op;
@@ -611,7 +611,7 @@ struct LanaiOperand : public MCParsedAsmOperand {
MorphToMemImm(std::unique_ptr<LanaiOperand> Op) {
const MCExpr *Imm = Op->getImm();
Op->Kind = MEMORY_IMM;
- Op->Mem.BaseReg = 0;
+ Op->Mem.BaseReg = MCRegister();
Op->Mem.AluOp = LPAC::ADD;
Op->Mem.OffsetReg = 0;
Op->Mem.Offset = Imm;
@@ -619,9 +619,9 @@ struct LanaiOperand : public MCParsedAsmOperand {
}
static std::unique_ptr<LanaiOperand>
- MorphToMemRegReg(unsigned BaseReg, std::unique_ptr<LanaiOperand> Op,
+ MorphToMemRegReg(MCRegister BaseReg, std::unique_ptr<LanaiOperand> Op,
unsigned AluOp) {
- unsigned OffsetReg = Op->getReg();
+ MCRegister OffsetReg = Op->getReg();
Op->Kind = MEMORY_REG_REG;
Op->Mem.BaseReg = BaseReg;
Op->Mem.AluOp = AluOp;
@@ -631,7 +631,7 @@ struct LanaiOperand : public MCParsedAsmOperand {
}
static std::unique_ptr<LanaiOperand>
- MorphToMemRegImm(unsigned BaseReg, std::unique_ptr<LanaiOperand> Op,
+ MorphToMemRegImm(MCRegister BaseReg, std::unique_ptr<LanaiOperand> Op,
unsigned AluOp) {
const MCExpr *Imm = Op->getImm();
Op->Kind = MEMORY_REG_IMM;
@@ -691,21 +691,21 @@ LanaiAsmParser::parseRegister(bool RestoreOnFailure) {
SMLoc End = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
std::optional<AsmToken> PercentTok;
- unsigned RegNum;
+ MCRegister Reg;
// Eat the '%'.
if (Lexer.getKind() == AsmToken::Percent) {
PercentTok = Parser.getTok();
Parser.Lex();
}
if (Lexer.getKind() == AsmToken::Identifier) {
- RegNum = MatchRegisterName(Lexer.getTok().getIdentifier());
- if (RegNum == 0) {
+ Reg = MatchRegisterName(Lexer.getTok().getIdentifier());
+ if (!Reg) {
if (PercentTok && RestoreOnFailure)
Lexer.UnLex(*PercentTok);
return nullptr;
}
Parser.Lex(); // Eat identifier token
- return LanaiOperand::createReg(RegNum, Start, End);
+ return LanaiOperand::createReg(Reg, Start, End);
}
if (PercentTok && RestoreOnFailure)
Lexer.UnLex(*PercentTok);
@@ -900,7 +900,7 @@ ParseStatus LanaiAsmParser::parseMemoryOperand(OperandVector &Operands) {
// Use 0 if no offset given
int OffsetValue = 0;
- unsigned BaseReg = 0;
+ MCRegister BaseReg;
unsigned AluOp = LPAC::ADD;
bool PostOp = false, PreOp = false;
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h
index 1bc84014e7367f..3c0b34dc8ecf40 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h
@@ -37,8 +37,8 @@ enum TOF {
};
} // namespace LanaiII
-static inline unsigned getLanaiRegisterNumbering(unsigned Reg) {
- switch (Reg) {
+static inline unsigned getLanaiRegisterNumbering(MCRegister Reg) {
+ switch (Reg.id()) {
case Lanai::R0:
return 0;
case Lanai::R1:
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