[llvm] [AMDGPU] When allocating VGPRs, VGPR spills are not part of the prologue (PR #109439)

[Christudasan Devadasan via llvm-commits]

cdevadas wrote:

> My point is the wwm_vgpr_reload is part of the block prologue, right?

Yes. In such cases, the wwm-spill-restore should precede the `readlane` that restores the sgpr. This could frequently occur in the FastAlloc path. The liveout values are spilled at the block end and restored at the successor blocks'  begin. Matt had a workaround to fix such cases in the fastalloc.
https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/RegAllocFast.cpp#L656
https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/RegAllocFast.cpp#L699
But this could be an edge case in the Greedy allocator and cause problems. The InlineSpiller and SplitKit need a similar workaround made by Matt. They seem quite ugly though.
I don't recollect exactly why I used `isSpill` in the original patch. This could be one of the reasons.

We could conditionally add the wwm-spill-restore to the block begin when there is already an instruction in the bb-prolog that uses this restored register. The `isBasicBlockPrologue` function can accommodate that.





https://github.com/llvm/llvm-project/pull/109439