[llvm] [AMDGPU] When allocating VGPRs, VGPR spills are not part of the prologue (PR #109439)

[via llvm-commits]

ruiling wrote:

> > As I mentioned in the other PR, I think we also need to include wwm register reload.
> 
> The WWM reloads will happen for all lanes with the manipulated exec mask. Why do you think they should be included as well?

I think it could be possible that the sgpr_input of the `s_or_bnn exec, exec, sgpr_input` was restored from wwm-vgpr. like:
```
wwm_vgpr_reload v0, ...
v_readlane_b32 s0, v0, 0
s_or_b32 exec, exec, s0
```
My point is the wwm_vgpr_reload is part of the block prologue, right?

https://github.com/llvm/llvm-project/pull/109439