[llvm] [RISCV][MC] Support Assembling 48- and 64-bit Instructions (PR #110022)

[Sam Elliott via llvm-commits]

lenary wrote:

Looking back on the patch this morning, the only thing that is actually dependent on the length encodings themselves is actually the length detection logic, so I have updated the patch to never attempt to understand if an instruction might be longer than 4 bytes - instead you have to provide an explicit length for 6/8 byte encodings. I think this is a much better way forwards than a new feature, while the encodings are not yet frozen - and should still allow experimentation.

https://github.com/llvm/llvm-project/pull/110022