[llvm] 39babbf - [AMDGPU] Implement isSDNodeAlwaysUniform for INTRINSIC_W_CHAIN (#110114)

[via llvm-commits]

Author: Jay Foad
Date: 2024-09-26T14:44:14+01:00
New Revision: 39babbffc9f44244efaeca8951782a2a6ef814db

URL: https://github.com/llvm/llvm-project/commit/39babbffc9f44244efaeca8951782a2a6ef814db
DIFF: https://github.com/llvm/llvm-project/commit/39babbffc9f44244efaeca8951782a2a6ef814db.diff

LOG: [AMDGPU] Implement isSDNodeAlwaysUniform for INTRINSIC_W_CHAIN (#110114)

There are no always uniform side-effecting intrinsics upstream to test
this with, but we have examples downstream.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index fad51ce8285e01..94fdf4effa10a1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -900,6 +900,10 @@ bool AMDGPUTargetLowering::isSDNodeAlwaysUniform(const SDNode *N) const {
     unsigned IntrID = N->getConstantOperandVal(0);
     return AMDGPU::isIntrinsicAlwaysUniform(IntrID);
   }
+  case ISD::INTRINSIC_W_CHAIN: {
+    unsigned IntrID = N->getConstantOperandVal(1);
+    return AMDGPU::isIntrinsicAlwaysUniform(IntrID);
+  }
   case ISD::LOAD:
     if (cast<LoadSDNode>(N)->getMemOperand()->getAddrSpace() ==
         AMDGPUAS::CONSTANT_ADDRESS_32BIT)