[llvm] [AMDGPU] Implement isSDNodeAlwaysUniform for INTRINSIC_W_CHAIN (PR #110114)
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Thu Sep 26 05:02:42 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Jay Foad (jayfoad)
<details>
<summary>Changes</summary>
There are no always uniform side-effecting intrinsics upstream to test
this with, but we have examples downstream.
---
Full diff: https://github.com/llvm/llvm-project/pull/110114.diff
1 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (+4)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index fad51ce8285e01..94fdf4effa10a1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -900,6 +900,10 @@ bool AMDGPUTargetLowering::isSDNodeAlwaysUniform(const SDNode *N) const {
unsigned IntrID = N->getConstantOperandVal(0);
return AMDGPU::isIntrinsicAlwaysUniform(IntrID);
}
+ case ISD::INTRINSIC_W_CHAIN: {
+ unsigned IntrID = N->getConstantOperandVal(1);
+ return AMDGPU::isIntrinsicAlwaysUniform(IntrID);
+ }
case ISD::LOAD:
if (cast<LoadSDNode>(N)->getMemOperand()->getAddrSpace() ==
AMDGPUAS::CONSTANT_ADDRESS_32BIT)
``````````
</details>
https://github.com/llvm/llvm-project/pull/110114
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