[llvm] [AMDGPU] Implement isSDNodeAlwaysUniform for INTRINSIC_W_CHAIN (PR #110114)

[Jay Foad via llvm-commits]

https://github.com/jayfoad created https://github.com/llvm/llvm-project/pull/110114

There are no always uniform side-effecting intrinsics upstream to test
this with, but we have examples downstream.


>From ace67ff973794bf74c631be5d61ad85746b0c6cb Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Thu, 26 Sep 2024 13:00:55 +0100
Subject: [PATCH] [AMDGPU] Implement isSDNodeAlwaysUniform for
 INTRINSIC_W_CHAIN

There are no always uniform side-effecting intrinsics upstream to test
this with, but we have examples downstream.
---
 llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index fad51ce8285e01..94fdf4effa10a1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -900,6 +900,10 @@ bool AMDGPUTargetLowering::isSDNodeAlwaysUniform(const SDNode *N) const {
     unsigned IntrID = N->getConstantOperandVal(0);
     return AMDGPU::isIntrinsicAlwaysUniform(IntrID);
   }
+  case ISD::INTRINSIC_W_CHAIN: {
+    unsigned IntrID = N->getConstantOperandVal(1);
+    return AMDGPU::isIntrinsicAlwaysUniform(IntrID);
+  }
   case ISD::LOAD:
     if (cast<LoadSDNode>(N)->getMemOperand()->getAddrSpace() ==
         AMDGPUAS::CONSTANT_ADDRESS_32BIT)