[llvm] [RISCV][MC] Support Assembling 48- and 64-bit Instructions (PR #110022)

Sam Elliott via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 25 13:43:53 PDT 2024


lenary wrote:

Ok, I will revisit this PR tomorrow, to put these behind an experimental extension. I'm much less clear on what should be done in the disassembler though, as it also uses this encoding information.

https://github.com/llvm/llvm-project/pull/110022


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