[llvm] [SandboxVec][DAG] Implement DGNode::isMem() (PR #109504)

[Thorsten Schütt via llvm-commits]

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@@ -46,6 +53,9 @@ class DGNode {
   }
   /// \Returns true if there is a memory dependency N->this.
   bool hasMemPred(DGNode *N) const { return MemPreds.count(N); }
+  /// \Returns true if this may read/write memory, or if it has some ordering
+  /// constraings, like with stacksave/stackrestore and alloca/inalloca.
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tschuett wrote:

same here: constraings

https://github.com/llvm/llvm-project/pull/109504