[llvm] [SandboxVec][DAG] Implement DGNode::isMem() (PR #109504)

[Thorsten Schütt via llvm-commits]

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@@ -35,9 +35,16 @@ class DGNode {
   Instruction *I;
   /// Memory predecessors.
   DenseSet<DGNode *> MemPreds;
+  /// This is true if this may read/write memory, or if it has some ordering
+  /// constraings, like with stacksave/stackrestore and alloca/inalloca.
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tschuett wrote:

typo: constraings

https://github.com/llvm/llvm-project/pull/109504