[llvm] [DL] Invert `getTypeStoreSize` bytes-bits relationship to avoid `divideCeil` (PR #106757)

via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 30 09:35:39 PDT 2024


github-actions[bot] wrote:

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git-clang-format --diff 18e55052d6c7da765bbec311b1b6ac9590a2bfa3 2ac0fead6c29cd9262789a23038054ffd5e4cd06 --extensions h -- llvm/include/llvm/IR/DataLayout.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/include/llvm/IR/DataLayout.h b/llvm/include/llvm/IR/DataLayout.h
index 96e284726c..172ae81e72 100644
--- a/llvm/include/llvm/IR/DataLayout.h
+++ b/llvm/include/llvm/IR/DataLayout.h
@@ -422,7 +422,8 @@ public:
   /// For example, returns 5 for i36 and 10 for x86_fp80.
   TypeSize getTypeStoreSize(Type *Ty) const {
     TypeSize StoreSizeInBits = getTypeStoreSizeInBits(Ty);
-    return {StoreSizeInBits.getKnownMinValue() / 8, StoreSizeInBits.isScalable()};
+    return {StoreSizeInBits.getKnownMinValue() / 8,
+            StoreSizeInBits.isScalable()};
   }
 
   /// Returns the maximum number of bits that may be overwritten by

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https://github.com/llvm/llvm-project/pull/106757


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