[llvm] [ARM] Don't use -1 as invalid register number in assembly parser. (PR #106666)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 30 01:39:41 PDT 2024


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@@ -4634,7 +4633,7 @@ bool ARMAsmParser::parseRegisterList(OperandVector &Operands, bool EnforceOrder,
     Reg = getDRegFromQReg(Reg);
     EReg = MRI->getEncodingValue(Reg);
     Registers.emplace_back(EReg, Reg);
-    ++Reg;
+    Reg = Reg + 1;
----------------
s-barannikov wrote:

IIRC registers are emitted in the order they are defined in td, which makes ++ work most of the time, but there is no guarantee in general.

In this particular case it should probably be `Reg = MRI->getSubReg(Reg, ARM::dsub_1)` (see `getDRegFromQReg`).


https://github.com/llvm/llvm-project/pull/106666


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