[llvm] [DSE] Don't shrink memory intrinsic if its liable to make codegen worse (PR #106425)

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goldsteinn wrote:


> * It looks like getLoadStoreVecRegBitWidth defaults to 128 and is not overridden on most targets. In the context of this patch, it will be misleading for any (sub-)targets without vectors. 128 bit is a good default assumption for a target that has vectors, but not for a scalar-only target.

Do you know how to test if a target supports vectors? I don't see any obvious knob.

https://github.com/llvm/llvm-project/pull/106425