[llvm] [X86] Shrink width of masked loads/stores (PR #105451)

[Shengchen Kan via llvm-commits]

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@@ -12128,6 +12128,24 @@ bool llvm::isAllOnesOrAllOnesSplat(SDValue N, bool AllowUndefs) {
   return C && C->isAllOnes() && C->getValueSizeInBits(0) == BitWidth;
 }
 
+APInt llvm::getDemandedEltsForMaskedOp(SDValue Mask, unsigned NumElts,
+                                       SmallVector<SDValue> *MaskEltsOut) {
+  if (!ISD::isBuildVectorOfConstantSDNodes(Mask.getNode()))
+    return APInt::getAllOnes(NumElts);
+  APInt Demanded = APInt::getZero(NumElts);
+  BuildVectorSDNode *MaskBV = cast<BuildVectorSDNode>(Mask);
+  for (unsigned i = 0; i < MaskBV->getNumOperands(); ++i) {
+    APInt V;
+    if (!sd_match(MaskBV->getOperand(i), m_ConstInt(V)))
+      return APInt::getAllOnes(NumElts);
+    if (V.isNegative())
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KanRobert wrote:

`isNegative()` -> `isOne()`?

https://github.com/llvm/llvm-project/pull/105451