[llvm] efa859c - [ARM] Use SelectonDAG::getSignedConstant.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 17 18:03:00 PDT 2024
Author: Craig Topper
Date: 2024-08-17T18:02:41-07:00
New Revision: efa859cd3e195bc4c377e8acf21d45fa410c63b6
URL: https://github.com/llvm/llvm-project/commit/efa859cd3e195bc4c377e8acf21d45fa410c63b6
DIFF: https://github.com/llvm/llvm-project/commit/efa859cd3e195bc4c377e8acf21d45fa410c63b6.diff
LOG: [ARM] Use SelectonDAG::getSignedConstant.
Added:
Modified:
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMInstrInfo.td
llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 7ffc64378ef4ba..f1b579ce7d2d9c 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -712,7 +712,8 @@ bool ARMDAGToDAGISel::SelectAddrModeImm12(SDValue N,
Base = CurDAG->getTargetFrameIndex(
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
}
- OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
+ OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
return true;
}
}
@@ -881,7 +882,8 @@ bool ARMDAGToDAGISel::SelectAddrMode2OffsetImmPre(SDNode *Op, SDValue N,
if (isScaledConstantInRange(N, /*Scale=*/1, 0, 0x1000, Val)) { // 12 bits.
if (AddSub == ARM_AM::sub) Val *= -1;
Offset = CurDAG->getRegister(0, MVT::i32);
- Opc = CurDAG->getTargetConstant(Val, SDLoc(Op), MVT::i32);
+ Opc =
+ CurDAG->getSignedConstant(Val, SDLoc(Op), MVT::i32, /*isTarget*/ true);
return true;
}
@@ -1185,7 +1187,8 @@ ARMDAGToDAGISel::SelectThumbAddrModeImm5S(SDValue N, unsigned Scale,
int RHSC;
if (isScaledConstantInRange(N.getOperand(1), Scale, 0, 32, RHSC)) {
Base = N.getOperand(0);
- OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
+ OffImm =
+ CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32, /*isTarget=*/true);
return true;
}
@@ -1247,7 +1250,8 @@ bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDValue N,
if (MFI.getObjectAlign(FI) >= Align(4)) {
Base = CurDAG->getTargetFrameIndex(
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
- OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
+ OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
return true;
}
}
@@ -1267,8 +1271,8 @@ bool ARMDAGToDAGISel::SelectTAddrModeImm7(SDValue N, SDValue &Base,
Base = N.getOperand(0);
if (N.getOpcode() == ISD::SUB)
RHSC = -RHSC;
- OffImm =
- CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32);
+ OffImm = CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N),
+ MVT::i32, /*isTarget=*/true);
return true;
}
}
@@ -1330,7 +1334,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue N,
Base = CurDAG->getTargetFrameIndex(
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
}
- OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
+ OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
return true;
}
}
@@ -1357,7 +1362,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue N, SDValue &Base,
if (N.getOpcode() == ISD::SUB)
RHSC = -RHSC;
OffImm =
- CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32);
+ CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
return true;
}
}
@@ -1387,7 +1393,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue N,
Base = CurDAG->getTargetFrameIndex(
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
}
- OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
+ OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
return true;
}
}
@@ -1404,8 +1411,10 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,
int RHSC;
if (isScaledConstantInRange(N, /*Scale=*/1, 0, 0x100, RHSC)) { // 8 bits.
OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
- ? CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32)
- : CurDAG->getTargetConstant(-RHSC, SDLoc(N), MVT::i32);
+ ? CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
+ /*isTarget=*/true)
+ : CurDAG->getSignedConstant(-RHSC, SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
return true;
}
@@ -1428,8 +1437,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm7(SDValue N, SDValue &Base,
if (N.getOpcode() == ISD::SUB)
RHSC = -RHSC;
- OffImm =
- CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32);
+ OffImm = CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N),
+ MVT::i32, /*isTarget=*/true);
return true;
}
}
@@ -1471,11 +1480,11 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm7Offset(SDNode *Op, SDValue N,
int RHSC;
// 7 bit constant, shifted by Shift.
if (isScaledConstantInRange(N, 1 << Shift, 0, 0x80, RHSC)) {
- OffImm =
- ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
- ? CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32)
- : CurDAG->getTargetConstant(-RHSC * (1 << Shift), SDLoc(N),
- MVT::i32);
+ OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
+ ? CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N),
+ MVT::i32, /*isTarget=*/true)
+ : CurDAG->getSignedConstant(-RHSC * (1 << Shift), SDLoc(N),
+ MVT::i32, /*isTarget=*/true);
return true;
}
return false;
@@ -1485,7 +1494,8 @@ template <int Min, int Max>
bool ARMDAGToDAGISel::SelectImmediateInRange(SDValue N, SDValue &OffImm) {
int Val;
if (isScaledConstantInRange(N, 1, Min, Max, Val)) {
- OffImm = CurDAG->getTargetConstant(Val, SDLoc(N), MVT::i32);
+ OffImm =
+ CurDAG->getSignedConstant(Val, SDLoc(N), MVT::i32, /*isTarget=*/true);
return true;
}
return false;
@@ -3861,8 +3871,7 @@ void ARMDAGToDAGISel::Select(SDNode *N) {
ConstantMaterializationCost(~Imm, Subtarget)) {
// The current immediate costs more to materialize than a negated
// immediate, so negate the immediate and use a BIC.
- SDValue NewImm =
- CurDAG->getConstant(~N1C->getZExtValue(), dl, MVT::i32);
+ SDValue NewImm = CurDAG->getConstant(~Imm, dl, MVT::i32);
// If the new constant didn't exist before, reposition it in the topological
// ordering so it is just before N. Otherwise, don't touch its location.
if (NewImm->getNodeId() == -1)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 1fab30a0b85508..1e8bb8a495e68b 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2841,7 +2841,8 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Ops.push_back(Callee);
if (isTailCall) {
- Ops.push_back(DAG.getTargetConstant(SPDiff, dl, MVT::i32));
+ Ops.push_back(
+ DAG.getSignedConstant(SPDiff, dl, MVT::i32, /*isTarget=*/true));
}
// Add argument registers to the end of the list so that they are known live
@@ -2892,7 +2893,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// we need to undo that after it returns to restore the status-quo.
bool TailCallOpt = getTargetMachine().Options.GuaranteedTailCallOpt;
uint64_t CalleePopBytes =
- canGuaranteeTCO(CallConv, TailCallOpt) ? alignTo(NumBytes, 16) : -1ULL;
+ canGuaranteeTCO(CallConv, TailCallOpt) ? alignTo(NumBytes, 16) : -1U;
Chain = DAG.getCALLSEQ_END(Chain, NumBytes, CalleePopBytes, InGlue, dl);
if (!Ins.empty())
@@ -8551,7 +8552,7 @@ static SDValue LowerVECTOR_SHUFFLEv8i8(SDValue Op,
SmallVector<SDValue, 8> VTBLMask;
for (int I : ShuffleMask)
- VTBLMask.push_back(DAG.getConstant(I, DL, MVT::i32));
+ VTBLMask.push_back(DAG.getSignedConstant(I, DL, MVT::i32));
if (V2.getNode()->isUndef())
return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1,
@@ -20671,7 +20672,8 @@ void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
}
return;
}
- Result = DAG.getTargetConstant(CVal, SDLoc(Op), Op.getValueType());
+ Result = DAG.getSignedConstant(CVal, SDLoc(Op), Op.getValueType(),
+ /*isTarget=*/true);
break;
}
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index c6bcad8e2a82c5..26f7d70b43b262 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -371,12 +371,14 @@ def ARMVCCElse : PatLeaf<(i32 2)>;
// imm_neg_XFORM - Return the negation of an i32 immediate value.
def imm_neg_XFORM : SDNodeXForm<imm, [{
- return CurDAG->getTargetConstant(-(int)N->getZExtValue(), SDLoc(N), MVT::i32);
+ return CurDAG->getSignedConstant(-(int)N->getZExtValue(), SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
}]>;
// imm_not_XFORM - Return the complement of a i32 immediate value.
def imm_not_XFORM : SDNodeXForm<imm, [{
- return CurDAG->getTargetConstant(~(int)N->getZExtValue(), SDLoc(N), MVT::i32);
+ return CurDAG->getSignedConstant(~(int)N->getZExtValue(), SDLoc(N), MVT::i32,
+ /*isTarget=*/true);
}]>;
def gi_imm_not_XFORM : GICustomOperandRenderer<"renderInvertedImm">,
GISDNodeXFormEquiv<imm_not_XFORM>;
diff --git a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
index ce6b0f9c07dc8d..b0158c64c1f383 100644
--- a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
+++ b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
@@ -2426,7 +2426,8 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Ops.push_back(Callee);
if (isTailCall)
- Ops.push_back(DAG.getTargetConstant(FPDiff, dl, MVT::i32));
+ Ops.push_back(
+ DAG.getSignedConstant(FPDiff, dl, MVT::i32, /*isTarget=*/true));
// Add argument registers to the end of the list so that they are known live
// into the call.
More information about the llvm-commits
mailing list