[llvm] [RISCV] Decompose LMUL > 1 reverses into LMUL * M1 vrgather.vv (PR #104574)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 16 10:28:43 PDT 2024


topperc wrote:

> I was thinking that as well, I haven't fully looked into why the loop vectorizer doesn't just do that.

I don't think the vectorizer knows how to make a strided load. So it would have to be a masked.gather with vscale minus step vector?

I have code in my downstream for vp.load+vp.reverse -> vp.strided.load (might have come from BSC), but not for load+reverse.

https://github.com/llvm/llvm-project/pull/104574


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