[llvm] [ScheduleDAG] Dirty height/depth in addPred/removePred even for latency zero (PR #102915)

Björn Pettersson via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 16 10:01:40 PDT 2024


bjope wrote:

I haven't really checked if this has any big impact on compile times. I think the original idea was to save some compile time. That was however base on the wrong assumption that adding/removing zero latency edges wouldn't impact scheduling.

https://github.com/llvm/llvm-project/pull/102915


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