[llvm] [Attributor][FIX] Ensure we do not use stale references (PR #104495)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 15 13:12:30 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Johannes Doerfert (jdoerfert)
<details>
<summary>Changes</summary>
When copying map entries, we might run into resizing and invalidate the RHS of the assignment. We dealt with this before and now use the proper helper to avoid the problem in another place.
Fixes: https://github.com/llvm/llvm-project/issues/104397
---
Patch is 24.20 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/104495.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/IPO/AttributorAttributes.cpp (+5-2)
- (added) llvm/test/Transforms/Attributor/reduced/aapointer_info_map_invalidation.ll (+588)
``````````diff
diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
index 41a7fc0870cf0a..9f033028347f0d 100644
--- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -1628,6 +1628,8 @@ ChangeStatus AAPointerInfoFloating::updateImpl(Attributor &A) {
<< "\n");
assert(OffsetInfoMap.count(CurPtr) &&
"The current pointer offset should have been seeded!");
+ assert(!OffsetInfoMap[CurPtr].isUnassigned() &&
+ "Current pointer should be assigned");
if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Usr)) {
if (CE->isCast())
@@ -1906,6 +1908,7 @@ ChangeStatus AAPointerInfoFloating::updateImpl(Attributor &A) {
};
auto EquivalentUseCB = [&](const Use &OldU, const Use &NewU) {
assert(OffsetInfoMap.count(OldU) && "Old use should be known already!");
+ assert(!OffsetInfoMap[OldU].isUnassigned() && "Old use should be assinged");
if (OffsetInfoMap.count(NewU)) {
LLVM_DEBUG({
if (!(OffsetInfoMap[NewU] == OffsetInfoMap[OldU])) {
@@ -1916,8 +1919,8 @@ ChangeStatus AAPointerInfoFloating::updateImpl(Attributor &A) {
});
return OffsetInfoMap[NewU] == OffsetInfoMap[OldU];
}
- OffsetInfoMap[NewU] = OffsetInfoMap[OldU];
- return true;
+ bool Unused;
+ return HandlePassthroughUser(NewU.get(), OldU.get(), Unused);
};
if (!A.checkForAllUses(UsePred, *this, AssociatedValue,
/* CheckBBLivenessOnly */ true, DepClassTy::OPTIONAL,
diff --git a/llvm/test/Transforms/Attributor/reduced/aapointer_info_map_invalidation.ll b/llvm/test/Transforms/Attributor/reduced/aapointer_info_map_invalidation.ll
new file mode 100644
index 00000000000000..a7622143c2e736
--- /dev/null
+++ b/llvm/test/Transforms/Attributor/reduced/aapointer_info_map_invalidation.ll
@@ -0,0 +1,588 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes
+; RUN: opt -passes=attributor -S < %s | FileCheck %s --check-prefixes=CHECK
+
+define amdgpu_kernel void @__omp_offloading_fd00_2c00523__ZN11qmcplusplus7ompBLAS9gemv_implIfEEiRiciiT_PKS3_iS5_iS3_PS3_i_l383() {
+; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn
+; CHECK-LABEL: define {{[^@]+}}@__omp_offloading_fd00_2c00523__ZN11qmcplusplus7ompBLAS9gemv_implIfEEiRiciiT_PKS3_iS5_iS3_PS3_i_l383
+; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[TMP1:%.*]] = alloca [0 x [0 x float]], i32 0, align 8, addrspace(5)
+; CHECK-NEXT: [[TMP2:%.*]] = addrspacecast ptr addrspace(5) [[TMP1]] to ptr
+; CHECK-NEXT: store ptr [[TMP2]], ptr addrspace(5) [[TMP1]], align 8
+; CHECK-NEXT: [[TMP3:%.*]] = call fastcc i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr nocapture nofree noundef readonly align 8 dereferenceable_or_null(8) [[TMP2]], i1 noundef false)
+; CHECK-NEXT: ret void
+;
+ %1 = alloca [0 x [0 x float]], i32 0, align 8, addrspace(5)
+ %2 = addrspacecast ptr addrspace(5) %1 to ptr
+ store ptr %2, ptr addrspace(5) %1, align 8
+ %3 = call fastcc i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr %2, i1 false)
+ ret void
+}
+
+define fastcc i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr %0, i1 %1) {
+; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn
+; CHECK-LABEL: define {{[^@]+}}@__kmpc_nvptx_parallel_reduce_nowait_v2
+; CHECK-SAME: (ptr nocapture nofree nonnull readonly align 8 dereferenceable(8) [[TMP0:%.*]], i1 noundef [[TMP1:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP3:%.*]], label [[TMP79:%.*]]
+; CHECK: 3:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP4:%.*]], label [[TMP6:%.*]]
+; CHECK: 4:
+; CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP5]], align 8
+; CHECK-NEXT: br label [[TMP77:%.*]]
+; CHECK: 6:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP7:%.*]], label [[TMP9:%.*]]
+; CHECK: 7:
+; CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP8]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 9:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP10:%.*]], label [[TMP12:%.*]]
+; CHECK: 10:
+; CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP11]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 12:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP13:%.*]], label [[TMP15:%.*]]
+; CHECK: 13:
+; CHECK-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP14]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 15:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP16:%.*]], label [[TMP18:%.*]]
+; CHECK: 16:
+; CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP17]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 18:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP19:%.*]], label [[TMP21:%.*]]
+; CHECK: 19:
+; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP20]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 21:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP22:%.*]], label [[TMP24:%.*]]
+; CHECK: 22:
+; CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP23]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 24:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP25:%.*]], label [[TMP27:%.*]]
+; CHECK: 25:
+; CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP26]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 27:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP28:%.*]], label [[TMP30:%.*]]
+; CHECK: 28:
+; CHECK-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP29]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 30:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP31:%.*]], label [[TMP33:%.*]]
+; CHECK: 31:
+; CHECK-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP32]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 33:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP34:%.*]], label [[TMP36:%.*]]
+; CHECK: 34:
+; CHECK-NEXT: [[TMP35:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP35]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 36:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP37:%.*]], label [[TMP39:%.*]]
+; CHECK: 37:
+; CHECK-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP38]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 39:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP40:%.*]], label [[TMP42:%.*]]
+; CHECK: 40:
+; CHECK-NEXT: [[TMP41:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP41]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 42:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP43:%.*]], label [[TMP45:%.*]]
+; CHECK: 43:
+; CHECK-NEXT: [[TMP44:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP44]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 45:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP46:%.*]], label [[TMP48:%.*]]
+; CHECK: 46:
+; CHECK-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP47]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 48:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP49:%.*]], label [[TMP51:%.*]]
+; CHECK: 49:
+; CHECK-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP50]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 51:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP52:%.*]], label [[TMP54:%.*]]
+; CHECK: 52:
+; CHECK-NEXT: [[TMP53:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP53]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 54:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP55:%.*]], label [[TMP57:%.*]]
+; CHECK: 55:
+; CHECK-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP56]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 57:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP58:%.*]], label [[TMP60:%.*]]
+; CHECK: 58:
+; CHECK-NEXT: [[TMP59:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP59]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 60:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP61:%.*]], label [[TMP63:%.*]]
+; CHECK: 61:
+; CHECK-NEXT: [[TMP62:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP62]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 63:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP64:%.*]], label [[TMP66:%.*]]
+; CHECK: 64:
+; CHECK-NEXT: [[TMP65:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP65]], align 8
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 66:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP67:%.*]], label [[TMP69:%.*]]
+; CHECK: 67:
+; CHECK-NEXT: [[TMP68:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP68]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 69:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP70:%.*]], label [[TMP72:%.*]]
+; CHECK: 70:
+; CHECK-NEXT: [[TMP71:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP71]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 72:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP73:%.*]], label [[TMP75:%.*]]
+; CHECK: 73:
+; CHECK-NEXT: [[TMP74:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP74]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 75:
+; CHECK-NEXT: [[TMP76:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP76]], align 4
+; CHECK-NEXT: br label [[TMP77]]
+; CHECK: 77:
+; CHECK-NEXT: [[TMP78:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP78]], align 4
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP80:%.*]], label [[TMP82:%.*]]
+; CHECK: 79:
+; CHECK-NEXT: ret i32 0
+; CHECK: 80:
+; CHECK-NEXT: [[TMP81:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP81]], align 8
+; CHECK-NEXT: ret i32 0
+; CHECK: 82:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP83:%.*]], label [[TMP85:%.*]]
+; CHECK: 83:
+; CHECK-NEXT: [[TMP84:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP84]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 85:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP86:%.*]], label [[TMP88:%.*]]
+; CHECK: 86:
+; CHECK-NEXT: [[TMP87:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP87]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 88:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP89:%.*]], label [[TMP91:%.*]]
+; CHECK: 89:
+; CHECK-NEXT: [[TMP90:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP90]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 91:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP92:%.*]], label [[TMP94:%.*]]
+; CHECK: 92:
+; CHECK-NEXT: [[TMP93:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP93]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 94:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP95:%.*]], label [[TMP97:%.*]]
+; CHECK: 95:
+; CHECK-NEXT: [[TMP96:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP96]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 97:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP98:%.*]], label [[TMP100:%.*]]
+; CHECK: 98:
+; CHECK-NEXT: [[TMP99:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP99]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 100:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP101:%.*]], label [[TMP103:%.*]]
+; CHECK: 101:
+; CHECK-NEXT: [[TMP102:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP102]], align 8
+; CHECK-NEXT: ret i32 0
+; CHECK: 103:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP104:%.*]], label [[TMP106:%.*]]
+; CHECK: 104:
+; CHECK-NEXT: [[TMP105:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP105]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 106:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP107:%.*]], label [[TMP109:%.*]]
+; CHECK: 107:
+; CHECK-NEXT: [[TMP108:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP108]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 109:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP110:%.*]], label [[TMP112:%.*]]
+; CHECK: 110:
+; CHECK-NEXT: [[TMP111:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP111]], align 4
+; CHECK-NEXT: ret i32 0
+; CHECK: 112:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP113:%.*]], label [[TMP115:%.*]]
+; CHECK: 113:
+; CHECK-NEXT: [[TMP114:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP114]], align 8
+; CHECK-NEXT: ret i32 0
+; CHECK: 115:
+; CHECK-NEXT: br i1 [[TMP1]], label [[TMP116:%.*]], label [[TMP118:%.*]]
+; CHECK: 116:
+; CHECK-NEXT: [[TMP117:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i64 0, ptr [[TMP117]], align 8
+; CHECK-NEXT: ret i32 0
+; CHECK: 118:
+; CHECK-NEXT: [[TMP119:%.*]] = load ptr, ptr [[TMP0]], align 8
+; CHECK-NEXT: store i32 0, ptr [[TMP119]], align 4
+; CHECK-NEXT: ret i32 0
+;
+ br i1 %1, label %3, label %88
+
+3: ; preds = %2
+ %4 = load ptr, ptr %0, align 8
+ br i1 %1, label %5, label %7
+
+5: ; preds = %3
+ %6 = load ptr, ptr %0, align 8
+ store i64 0, ptr %6, align 8
+ br label %79
+
+7: ; preds = %3
+ br i1 %1, label %8, label %11
+
+8: ; preds = %7
+ %9 = load i32, ptr %4, align 4
+ %10 = load ptr, ptr %0, align 8
+ store i32 0, ptr %10, align 4
+ br label %79
+
+11: ; preds = %7
+ br i1 %1, label %12, label %14
+
+12: ; preds = %11
+ %13 = load ptr, ptr %0, align 8
+ store i32 0, ptr %13, align 4
+ br label %79
+
+14: ; preds = %11
+ br i1 %1, label %15, label %17
+
+15: ; preds = %14
+ %16 = load ptr, ptr %0, align 8
+ store i32 0, ptr %16, align 4
+ br label %79
+
+17: ; preds = %14
+ br i1 %1, label %18, label %20
+
+18: ; preds = %17
+ %19 = load ptr, ptr %0, align 8
+ store i32 0, ptr %19, align 4
+ br label %79
+
+20: ; preds = %17
+ br i1 %1, label %21, label %23
+
+21: ; preds = %20
+ %22 = load ptr, ptr %0, align 8
+ store i32 0, ptr %22, align 4
+ br label %79
+
+23: ; preds = %20
+ br i1 %1, label %24, label %26
+
+24: ; preds = %23
+ %25 = load ptr, ptr %0, align 8
+ store i32 0, ptr %25, align 4
+ br label %79
+
+26: ; preds = %23
+ br i1 %1, label %27, label %29
+
+27: ; preds = %26
+ %28 = load ptr, ptr %0, align 8
+ store i32 0, ptr %28, align 8
+ br label %79
+
+29: ; preds = %26
+ br i1 %1, label %30, label %32
+
+30: ; preds = %29
+ %31 = load ptr, ptr %0, align 8
+ store i32 0, ptr %31, align 4
+ br label %79
+
+32: ; preds = %29
+ br i1 %1, label %33, label %35
+
+33: ; preds = %32
+ %34 = load ptr, ptr %0, align 8
+ store i32 0, ptr %34, align 4
+ br label %79
+
+35: ; preds = %32
+ br i1 %1, label %36, label %38
+
+36: ; preds = %35
+ %37 = load ptr, ptr %0, align 8
+ store i32 0, ptr %37, align 4
+ br label %79
+
+38: ; preds = %35
+ br i1 %1, label %39, label %41
+
+39: ; preds = %38
+ %40 = load ptr, ptr %0, align 8
+ store i64 0, ptr %40, align 8
+ br label %79
+
+41: ; preds = %38
+ br i1 %1, label %42, label %44
+
+42: ; preds = %41
+ %43 = load ptr, ptr %0, align 8
+ store i64 0, ptr %43, align 8
+ br label %79
+
+44: ; preds = %41
+ br i1 %1, label %45, label %47
+
+45: ; preds = %44
+ %46 = load ptr, ptr %0, align 8
+ store i32 0, ptr %46, align 4
+ br label %79
+
+47: ; preds = %44
+ br i1 %1, label %48, label %50
+
+48: ; preds = %47
+ %49 = load ptr, ptr %0, align 8
+ store i32 0, ptr %49, align 4
+ br label %79
+
+50: ; preds = %47
+ br i1 %1, label %51, label %53
+
+51: ; preds = %50
+ %52 = load ptr, ptr %0, align 8
+ store i64 0, ptr %52, align 8
+ br label %79
+
+53: ; preds = %50
+ br i1 %1, label %54, label %56
+
+54: ; preds = %53
+ %55 = load ptr, ptr %0, align 8
+ store i64 0, ptr %55, align 8
+ br label %79
+
+56: ; preds = %53
+ br i1 %1, label %57, label %59
+
+57: ; preds = %56
+ %58 = load ptr, ptr %0, align 8
+ store i32 0, ptr %58, align 4
+ br label %79
+
+59: ; preds = %56
+ br i1 %1, label %60, label %62
+
+60: ; preds = %59
+ %61 = load ptr, ptr %0, align 8
+ store i32 0, ptr %61, align 4
+ br label %79
+
+62: ; preds = %59
+ br i1 %1, label %63, label %65
+
+63: ; preds = %62
+ %64 = load ptr, ptr %0, align 8
+ store i64 0, ptr %64, align 8
+ br label %79
+
+65: ; preds = %62
+ br i1 %1, label %66, label %68
+
+66: ; preds = %65
+ %67 = load ptr, ptr %0, align 8
+ store i64 0, ptr %67, align 8
+ br label %79
+
+68: ; preds = %65
+ br i1 %1, label %69, label %71
+
+69: ; preds = %68
+ %70 = load ptr, ptr %0, align 8
+ store i32 0, ptr %70, align 4
+ br label %79
+
+71: ; preds = %68
+ br i1 %1, label %72, label %74
+
+72: ; preds = %71
+ %73 = load ptr, ptr %0, align 8
+ store i32 0, ptr %73, align 4
+ br label %79
+
+74: ; preds = %71
+ br i1 %1, label %75, label %77
+
+75: ; preds = %74
+ %76 = load ptr, ptr %0, align 8
+ store i32 0, ptr %76, align 4
+ br label %79
+
+77: ; preds = %74
+ %78 = load ptr, ptr %0, align 8
+ store i32 0, ptr %78, align 4
+ br label %79
+
+79: ...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/104495
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