[llvm] [RISCV][doc] Add note to RISCVUsage about supported atomics ABIs (PR #103879)

Alex Bradbury via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 15 06:24:39 PDT 2024


https://github.com/asb updated https://github.com/llvm/llvm-project/pull/103879

>From 67c1852b9270addef08007dcc70510fe23511add Mon Sep 17 00:00:00 2001
From: Alex Bradbury <asb at igalia.com>
Date: Wed, 14 Aug 2024 13:33:16 +0100
Subject: [PATCH 1/2] [RISCV][doc] Add note to RISCVUsage about supported
 atomics ABIs

It feels like this belongs to be documented somewhere. I've tried to
avoid giving too much detailed explanation as the psABI docs are the
better source for this.
---
 llvm/docs/RISCVUsage.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index b3c7b0e3883d01..bf186210b4af54 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -280,6 +280,11 @@ Supported
 ``Za128rs``, ``Za64rs``, ``Zama16b``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, ``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, ``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, ``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
   These extensions are defined as part of the `RISC-V Profiles specification <https://github.com/riscv/riscv-profiles/releases/tag/v1.0>`__.  They do not introduce any new features themselves, but instead describe existing hardware features.
 
+Atomics ABIs
+============
+
+At the time of writing there are three atomics mappings (ABIs) `defined for RISC-V <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version>__`.  As of LLVM 19, LLVM defaults to "A6S", which is compatible with both the original "A6" and the future "A7" ABI. See `the psABI atomics document <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-atomic.adoc>`__ for more information on these mappings.
+
 Experimental Extensions
 =======================
 

>From e1364ca802dca327ada45f568ef9116252b95551 Mon Sep 17 00:00:00 2001
From: Alex Bradbury <asb at igalia.com>
Date: Thu, 15 Aug 2024 14:24:05 +0100
Subject: [PATCH 2/2] Add note about atomics elf attribute not being emitted
 right now

---
 llvm/docs/RISCVUsage.rst | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index bf186210b4af54..fee7b7a4c840a0 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -285,6 +285,8 @@ Atomics ABIs
 
 At the time of writing there are three atomics mappings (ABIs) `defined for RISC-V <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version>__`.  As of LLVM 19, LLVM defaults to "A6S", which is compatible with both the original "A6" and the future "A7" ABI. See `the psABI atomics document <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-atomic.adoc>`__ for more information on these mappings.
 
+Note that although the "A6S" mapping is used, the ELF attribute recording the mapping isn't currently emitted by default due to a bug causing a crash in older versions of binutils when processing files containing this attribute.
+
 Experimental Extensions
 =======================
 



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