[llvm] [RISCV][GISel] Remove s32 support on RV64 for DIV, and REM. (PR #102519)

[Craig Topper via llvm-commits]

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@@ -348,7 +348,9 @@ define i32 @sdiv_i32(i32 %a, i32 %b) {
 ;
 ; RV64IM-LABEL: sdiv_i32:
 ; RV64IM:       # %bb.0: # %entry
-; RV64IM-NEXT:    divw a0, a0, a1
+; RV64IM-NEXT:    sext.w a0, a0
+; RV64IM-NEXT:    sext.w a1, a1
+; RV64IM-NEXT:    div a0, a0, a1
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topperc wrote:

That doesn't work. 0xffffffff80000000 / 0xffffffffffffffff should return 0x0000000080000000, but divw would return 0xffffffff80000000.

If the div started out as an s32, the upper 32 bits of the result don't matter and 0x80000000/0xffffffff is undefined behavior in C anyway. After legalization we can't tell if the div was promoted from s32 or was always an s64.

https://github.com/llvm/llvm-project/pull/102519