[llvm] 52220c2 - [AMDGPU][AsmParser][NFC] Remove a misleading comment. (#102604)

[via llvm-commits]

Author: Ivan Kosarev
Date: 2024-08-09T16:52:19+01:00
New Revision: 52220c295a2d8552aa085624059decbb93093dff

URL: https://github.com/llvm/llvm-project/commit/52220c295a2d8552aa085624059decbb93093dff
DIFF: https://github.com/llvm/llvm-project/commit/52220c295a2d8552aa085624059decbb93093dff.diff

LOG: [AMDGPU][AsmParser][NFC] Remove a misleading comment. (#102604)

The work of ParseRegularReg() should remain to be parsing the register
as it was specified, and not to try translate it to anything else.

It's up to operand predicates to decide on what is and is not an
acceptable register for an operand, including considering its expected
register class, and for the rest of the AsmParser infrastructure to
handle it respectively from there on.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index bbd9d75aac0e91..fc4cf57281d9b0 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -2937,10 +2937,6 @@ unsigned AMDGPUAsmParser::ParseRegularReg(RegisterKind &RegKind,
   StringRef RegSuffix = RegName.substr(RI->Name.size());
   unsigned SubReg = NoSubRegister;
   if (!RegSuffix.empty()) {
-    // We don't know the opcode till we are done parsing, so we don't know if
-    // registers should be 16 or 32 bit. It is therefore mandatory to put .l or
-    // .h to correctly specify 16 bit registers. We also can't determine class
-    // VGPR_16_Lo128 or VGPR_16, so always parse them as VGPR_16.
     if (RegSuffix.consume_back(".l"))
       SubReg = AMDGPU::lo16;
     else if (RegSuffix.consume_back(".h"))