[llvm] 199d6f2 - LSV: document hang reported in #37865 (#102479)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 9 03:34:14 PDT 2024
Author: Ramkumar Ramachandra
Date: 2024-08-09T11:34:09+01:00
New Revision: 199d6f2c0c5a7ceffe00036ae34e8a0f638e8a53
URL: https://github.com/llvm/llvm-project/commit/199d6f2c0c5a7ceffe00036ae34e8a0f638e8a53
DIFF: https://github.com/llvm/llvm-project/commit/199d6f2c0c5a7ceffe00036ae34e8a0f638e8a53.diff
LOG: LSV: document hang reported in #37865 (#102479)
LoadStoreVectorizer hangs on certain examples, when its reorder function
goes into a cycle. Detect this cycle and explicitly forbid it, using an
assert, and document the resulting crash in a test-case under AArch64.
Added:
llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
Modified:
llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
index c91911ecad7456..c35ea431296b70 100644
--- a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
@@ -216,6 +216,8 @@ void reorder(Instruction *I) {
if (IM->getParent() != I->getParent())
continue;
+ assert(IM != I && "Unexpected cycle while re-ordering instructions");
+
if (!IM->comesBefore(I)) {
InstructionsToMove.insert(IM);
Worklist.push_back(IM);
diff --git a/llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll b/llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
new file mode 100644
index 00000000000000..833e70814c2917
--- /dev/null
+++ b/llvm/test/Transforms/LoadStoreVectorizer/AArch64/pr37865.ll
@@ -0,0 +1,15 @@
+; REQUIRES: asserts
+; RUN: not --crash opt -mtriple=aarch64 -passes=load-store-vectorizer \
+; RUN: -disable-output %s 2>&1 | FileCheck %s
+
+define i32 @load_cycle(ptr %x) {
+; CHECK: Unexpected cycle while re-ordering instructions
+entry:
+ %gep.x.1 = getelementptr inbounds [2 x i32], ptr %x, i32 0, i32 1
+ %load.x.1 = load i32, ptr %gep.x.1
+ %rem = urem i32 %load.x.1, 1
+ %gep.x.2 = getelementptr inbounds [2 x i32], ptr %x, i32 %rem, i32 0
+ %load.x.2 = load i32, ptr %gep.x.2
+ %ret = add i32 %load.x.2, %load.x.1
+ ret i32 %ret
+}
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