[llvm] [X86][RA] Add two address hints for compressible NDD instructions. (PR #98603)

[Shengchen Kan via llvm-commits]

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@@ -1739,6 +1741,20 @@ void RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
   OS << "      false;\n";
   OS << "}\n\n";
 
+  OS << "bool " << ClassName << "::\n"
+     << "isGeneralPurposeRegister(const TargetRegisterClass *RC)"
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KanRobert wrote:

isGeneralPurposeRegisterClass

https://github.com/llvm/llvm-project/pull/98603